TSMC and Google push chipmaking boundaries with 3D ‘stacking’


Taiwan Semiconductor Manufacturing Co is working with Google and different US tech teams to develop a brand new approach of constructing semiconductors extra highly effective.

The trade’s conventional method of cramming ever extra transistors on to a single chip is beginning to lose steam. In response, the world’s largest contract chipmaker is specializing in chip packaging — a little-known a part of the method of constructing semiconductors however one that’s turning into an trade battleground.

Chip packaging is among the ultimate steps within the chipmaking course of, during which semiconductors are mounted right into a supportive case earlier than being positioned on a printed circuit board. It was lengthy thought to be much less technologically demanding than chip manufacturing.

However because the tempo of chip improvement has slowed in accordance with Moore’s Regulation — because it turns into harder to shrink the area between transistors and thus match extra on to a chip — the best way they’re packaged has come to the fore.

TSMC is now taking chip packaging vertically and horizontally, utilizing a brand new 3D know-how that it dubs SoIC. It makes it potential to stack and hyperlink a number of several types of chips — resembling processors, reminiscence and sensors — into one package deal, in accordance with the corporate. This method makes the entire chipset smaller, extra highly effective and extra energy-efficient.

TSMC plans to make use of its new 3D stacking know-how at a chip packaging plant it’s constructing within the Taiwanese metropolis of Miaoli, folks with data of the matter instructed Nikkei. Google and Superior Micro Units, Intel’s smaller rival, shall be amongst its first clients for SoIC chips, the sources added, and are serving to TSMC to check and certify them. Building on the plant is slated for completion subsequent yr, with mass manufacturing to start in 2022.

Whereas TSMC manufactures chips for nearly all the world’s key chip builders, from Apple, Huawei and Google to Qualcomm, Nvidia and Broadcom, it has beforehand left the chip packaging companies to a variety of specialized suppliers, together with ASE Know-how Holding, Amkor and Powertech, in addition to rising government-backed corporations in China, resembling Jiangsu Changjiang Electronics Know-how, Tongfu Microelectronics, and Tianshui Huatian Know-how Co.

With its SoIC know-how, nonetheless, TSMC is ready to lock its premium clients into its ecosystem for chip packaging as nicely, a chip packaging professional with data of the developments instructed Nikkei Asia. It’s because clients who want higher-end chips are extra prepared to check the most recent applied sciences.

“TSMC is, in fact, not attempting to interchange all conventional chip packaging gamers, nevertheless it goals to serve these premium shoppers on the very high of the pyramid so these deep-pocketed chip builders like Apple, Google, AMD and Nvidia received’t depart TSMC for its rivals,” the individual stated.

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“These new chip stacking techs require superior chip manufacturing experience in addition to a whole lot of laptop simulations to attain exact stacking, so it’s very troublesome for conventional chip packaging suppliers to step in,” stated one other chip packaging trade professional.

TSMC shouldn’t be the one chipmaker investigating the probabilities of extra superior chip packaging.

Smaller rival Semiconductor Manufacturing Worldwide Co, China’s largest contract chipmaker, is taking a look at constructing equally superior chip packaging capability and has ordered tools from a few of TSMC’s suppliers to run a small-scale superior packaging line, a number of sources stated. That is even if most trade executives don’t anticipate SMIC to have the ability to tackle market leaders, each as a result of it lacks the technological prowess and due to Washington’s tightening export controls on the Chinese language chipmaker.

“Nonetheless, we clearly see SMIC’s ambition to develop its footprint on the forefront of chip packaging, though it would take a whole lot of time,” one of many sources stated.

Intel and Samsung, the world’s two largest semiconductor producers by income, are additionally betting huge on next-generation chip stacking know-how, and every claims to be on the forefront of the trade on this space. However in contrast to TSMC, which serves a variety of chip designers, Intel and Samsung largely construct chips for their very own use, and are growing superior packaging capabilities primarily to distinguish their chips from these of their rivals.

Samsung, alternatively, is aggressively increasing its foundry operations — the enterprise of constructing chips for different corporations — and counts Qualcomm and Nvidia as key clients. This places the South Korean chip titan in additional direct competitors with TSMC.

“We anticipate income from our back-end companies, which embrace each superior packaging and testing, to develop at a fee barely above the company common within the subsequent few years,” CC Wei, TSMC chief govt and vice-chairman, stated in an earnings briefing in mid-October.

TSMC’s income from chip packaging and testing companies reached $2.8bn in 2019, about eight per cent of its complete income of $34.63bn, and is predicted to develop at near the identical fee as its income for 2020, the corporate stated.

Google plans to make use of chips made with the SolC course of for autonomous driving techniques and different purposes, an individual with data of the matter instructed Nikkei Asia. Google is a relative newcomer in designing its personal chips, which it at present makes use of for synthetic intelligence computing in its knowledge centre servers.

AMD, which develops microprocessors for computer systems and servers, can be desperate to reap the benefits of the most recent stacking applied sciences in hopes of making chip merchandise able to outperforming these of its greater rival Intel, one other individual stated.

TSMC declined to touch upon particular clients however instructed Nikkei Asia that as a result of computing duties are far more different and demanding than they was once, “it’s obligatory for semiconductor and packaging applied sciences to evolve collectively”. Buyer demand for superior chip packaging companies, it added, is rising.

TSMC’s critical entrance within the chip packaging enterprise got here in 2016 to assist Apple develop extra highly effective chips — packaging processors along with reminiscence chips — for its flagship iPhones. TSMC’s signature packaging service has been seen by some market watchers as one of many the reason why Apple is sticking with TSMC as the only provider of iPhone processors. Up till this yr, most of TSMC’s chip packing income has nonetheless been from Apple, in accordance with Mark Li, an analyst with Bernstein Analysis.

The superior packaging trade was price $29bn in 2019 and is predicted to develop at a compound annual development fee of 6.6 per cent between 2019 and 2025, to achieve $42bn in 2025, in accordance with analysis company Yole Growth. Inside all of the segments, 3D stacking packing is ready to develop essentially the most quickly at a fee of 25 per cent in the identical interval, the analysis firm stated.

TSMC already has a chip packaging plant within the Taiwanese metropolis of Taoyuan, primarily serving Apple’s wants. In addition to Taoyuan and Miaoli, TSMC can be constructing a chip packaging plant within the southern Taiwanese metropolis of Tainan close to its most superior 5-nanometer chip plant, dubbed Plant 18, which remains to be increasing to later churn out much more superior 3-nanometer chips.

Arisa Liu, a semiconductor analyst with the Taiwan Institute of Financial Analysis, stated the demand for superior packing was rising, as premium chip builders worldwide sought extra customised chips that would generate highly effective efficiency and assist them stand out from their rivals.

“It has turn out to be a brand new area for main chip producers TSMC, Samsung and Intel, in addition to for international main chip builders,” Ms Liu stated. “It’s additionally seen as a method to counter the slowing of Moore’s Regulation.”

Google and AMD didn’t reply to Nikkei Asia’s request for remark.

A model of this text was first revealed by Nikkei Asia on November 18 2020 ©2020 Nikkei Inc. All rights reserved.

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